FC203A Module is an efficient implementation of a ‘Power Spectrum Extraction/Exchange FPGA core’ via a general table chop/swap operation, specifically designed for use in front of the FC203B Power Spectrum Interleave module. Estimation of the power spectrum of a digital signal, can be used to generate an error signal to tune an FIR filter, as an example.
A control word defines how many input samples are to be passed through to the output, and the low-order half of those samples are passed to one output while the high-order samples are passed to the second output. The high/low division may optionally be exchanged by asserting a bit in the control word. As standard the core is shipped as a 3L Diamond FPGA task but it can be also provided as a pure VHDL core. In order for this core to be used within a Diamond/FPGA system, the I/O interfaces are standardized to the model described by Diamond as shown bellow.
