FC203 FPGA IP core consists of two parts, namely FC203A and B. The FC203B core implements the time slot assembly of the FC203 group while the FC203A provides raw spectral information from groups of channels. FC203B core is designed to efficiently merge the data from multiple channels into one time-multiplexed spectral information stream. In conjunction with FC203A, this module can be used in radio/telecommunication applications using FDMA highways, as an example.
FC203B is a pure-FPGA task, and implements the following interfaces:
If used within a 3L Diamond/FPGA system, the I/O interfaces are standardized to the model described by Diamond as shown below:
FC203B Performance Estimates and Resource Utilization:
FC203B is a complete Diamond/FPGA firmware module that includes (the firmware can be used outside the Diamond environment) :
- Firmware source (.vhd) files.
- Diamond/FPGA integration support (.fcd, _pkg.vhd) and example implementations.
- VHDL Module-level testbench for both FC203A and FC203B working together.
- C Simulation harness [NOTE: Not available in Release 0.1 but can be supplied on request].
- Matlab analysis tools [NOTE: Not available in Release 0.1 but can be supplied on request].
- User Guide.